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| XC3S50AN-4TQG144C资料 | |
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XC3S50AN-4TQG144C PDF Download |
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File Size : 116 KB
Manufacturer:XILINX Description:NOTES: 1. CL includes probe and jig capacitance. 2. IDD tested with clock and data inputs held at VDD or GND, and IO = 0mA. 3. All input pulses are supplied by generators having the following characteristics: PRR 10MHz, ZO = 50Ω, input slew rate = 1 V/ns 20% (unless otherwise specified). 4. The outputs are measured one at a time with one transition per measurement. 5. VTT = VREF = VDDQ/2 6. VIH = VREF + 310mV (AC voltage levels) for differential inputs. VIH = VDD for LVCMOS input. 7. VIL = VREF - 310mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS input. 8. tPLH and tPHL are the same as tPD. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号:XC3S50AN-4TQG144C 厂 家:XILINX 封 装:80 批 号:07+ 数 量:TQFP144 说 明: |
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运 费: 所在地: 新旧程度: |
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