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XC3S50AN-4TQG144C

XC3S50AN-4TQG144C资料
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File Size : 116 KB Manufacturer:XILINX Description:NOTES: 1. CL includes probe and jig capacitance. 2. IDD tested with clock and data inputs held at VDD or GND, and IO = 0mA. 3. All input pulses are supplied by generators having the following characteristics: PRR 10MHz, ZO = 50Ω, input slew rate = 1 V/ns 20% (unless otherwise specified). 4. The outputs are measured one at a time with one transition per measurement. 5. VTT = VREF = VDDQ/2 6. VIH = VREF + 310mV (AC voltage levels) for differential inputs. VIH = VDD for LVCMOS input. 7. VIL = VREF - 310mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS input. 8. tPLH and tPHL are the same as tPD.

	1PCS	100PCS	1K	10K
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型号：XC3S50AN-4TQG144C 厂家：XILINX 封装：80 批号：07+ 数量：TQFP144 说明：


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