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XC3042A-7TQ144C

XC3042A-7TQ144C资料
XC3042A-7TQ144C
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File Size : 116 KB
Manufacturer:XILINX
Description:Serial operation occurs when nP_LOAD is HIGH and S_LOAD is LOW. The shift register is loaded by sampling the S_DATA bits with the rising edge of S_CLOCK. The contents of the shift register are loaded into the M divider and N output di- vider when S_LOAD transitions from LOW-to-HIGH. The M divide and N output divide values are latched on the HIGH-to- LOW transition of S_LOAD. If S_LOAD is held HIGH, data at the S_DATA input is passed directly to the M divider and N output divider on each rising edge of S_CLOCK. The serial mode can be used to program the M and N bits and test bits T1 and T0. The internal registers T0 and T1 determine the state of the TEST output as follows:   T1 T0TEST Output
 
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型 号:XC3042A-7TQ144C
厂 家:XILINX
封 装:42
批 号:05+
数 量:QFP144
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