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| XC3042-70TQ100I资料 | |
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XC3042-70TQ100I PDF Download |
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File Size : 116 KB
Manufacturer:XILINX Description:addressed to this node is received, or conditionally when a PHY interrupt occurs. The PHY deasserts the S5_LKON_DS2 output when the LLC becomes active (both LPS sensed as active and the LCtrl bit set to 1). The PHY also deasserts the S5_LKON_DS2 output when a bus reset occurs, unless a PHY interrupt condition exists which would otherwise cause S5_LKON_DS2 to be active. If the PHY is power cycled and the power class is 0 through 4, then the PHY asserts S5_LKON_DS2 for approximately 167 µs or until both the LPS is active and the LCtrl bit is 1. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：XC3042-70TQ100I 厂 家：XILINX 封 装：500 批 号：05+ 数 量：QFP 说 明： |
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运 费： 所在地： 新旧程度： |
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