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| XC2S50-5PQ208C资料 | |
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XC2S50-5PQ208C PDF Download |
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File Size : 116 KB
Manufacturer:XILINX Description:32 transmit queues with optional priority levels 64K VCCs maximum ** AAL5 and AAL3/4 CPCS generation AAL0 null CPCS (optional use of PTI for PDU demarcation) ATM cell header generation Raw cell mode (52 octet) 200 Mbps half duplex 155 Mbps full duplex (with 2-cell PDUs) Message and streaming status modes Variable-length transmit FIFO-CDV-host latency matching (1 to 9 cells) Symmetric Tx and Rx architecture C Buffer descriptors C Queues User-defined field circulates back to host (32 bits) Distributed host or SAR-shared memory segmentation Simultaneous segmentation and reassembly Per-PDU control of CLP/PTI (UBR) Per-PDU control of AAL5 UU field Virtual Tx FIFO (PCI host) |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：XC2S50-5PQ208C 厂 家：XILINX 封 装：14 批 号：02+ 数 量：QFP208 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：关女士 |
| 电 话：86-75584720945 |
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| 公司地址： Huaqiang Electronic World, Futian District, Shenzhen, China |
