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TEA1062AT

TEA1062AT资料
TEA1062AT
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File Size : 116 KB
Manufacturer:PHILIPS
Description:After a bank has been activated, a read or write cycle can be followed. This is accomplished by setting RAS high and CAS low at the clock rising edge after minimum of tRCD delay. WE pin voltage level defines whether the access cycle is a read operation ( WE high), or a write operation ( WE low). The address inputs determine the starting column address. Reading or writing to a different row within an activated bank requires the bank be precharged and a new Bank Activate command be issued. When more than one bank is activated, interleaved bank Read or Write operations are possible. By using the programmed burst length and alternating the access and precharge operations between multiple banks, seamless data access operation among many different pages can be realized. Read or Write Commands can also be issued to the same bank or between active banks on every clock cycle.
 
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型 号:TEA1062AT
厂 家:PHILIPS
封 装:5000
批 号:04+
数 量:SMD
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