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| SI1303DL-T1资料 | |
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SI1303DL-T1 PDF Download |
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File Size : 116 KB
Manufacturer:VISHAY Description:The sampling frequency is determined by the crystal (master mode) or master clock in (slave mode) which should be either 8.192 MHz (Fs = 32 kHz), 11.2896 MHz (Fs = 44.1 kHz), or 12.288 MHz (Fs = 48 kHz). Twice the normal sampling frequency can be selected by using the DBSPD pin which allows usage of Fs = 88.2 kHz or Fs = 96 kHz. In the double-speed slave mode (DBSPD = 1, M_S = 0), the external clock input is either 22.5796 MHz (Fs = 88.2 kHz) or 24.576 MHz (Fs = 96 kHz). Note that 32-kHz sampling is supported in the normal speed modes. Table 1 explains the proper clock selection. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：SI1303DL-T1 厂 家：VISHAY 封 装：15000 批 号：05+ 数 量：SOT-23 说 明： |
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运 费： 所在地： 新旧程度： |
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