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PWB100A30

PWB100A30资料
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File Size : 116 KB Manufacturer:73 Description:This pin establishes the reference current for the internal current steering buffers of the CPU clocks. A resistor is connected from this pin to ground to set the value of this current. See applications data on page 9 of this data sheet for details. Fixed 66.67 MHz clock output for driving the IMI B9852 buffer device. When asserted low, this pin Invokes power-down mode by shutting off all the clocks, disabling all internal circuitry, and shutting down the crystal oscillator. The 3VMref, 3VMref_B, 3V66, REF and CPU clocks are driven low during this condition. It has a 250KΩ internal Pull-up. Input select pins. See table 1, page 1. Each pin has a 250KΩ internal Pull-down Input select pin. See table 1, page 1. It has a 250KΩ internal Pull-up Crystal Buffer output pin. Connects to a crystal only. When an external signal other than a crystal is used or when in Test mode, this pin is kept unconnected. Crystal Buffer input pin. Connects to a crystal, or an external single ended input clock signal. A buffered output clock of the signal applied at Xin. Typically, 14.31818MHz. These input select pins configure the LOH current (and thus the VOH swing amplitude) of the CPU clock output pairs. Each pin has a 250KΩ internal Pull-up. See the table 5 for current and resistor values. 3.3V power supply pins for Ref clock and crystal buffer. 3.3V power supply pins for CPU(1:6) / CPU(1:6)# outputs. 3.3V power supply pins for common supply to the core. 3.3V power supply pins for 3V66 output. 3.3V power supply pins for internal current reference circuitry and internal PLL. 3.3V power supply pin for 3Vmref and 3Vmref_b outputs Ground pins for the Ref clock and crystal buffer. Ground pins for the CPU(1:6)/CPU(1:6)# outputs. Ground pins for common supply to the core. Ground pin for the 3V66 output. Ground pin for internal current reference circuitry and internal PLL. Ground pin for 3Vmref and 3Vmref_b outputs.


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