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| MX28F2000PQC-12C4资料 | |
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MX28F2000PQC-12C4 PDF Download |
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File Size : 116 KB
Manufacturer:MX Description:Note 4: Receiver Skew Margin is defined as the valid data sampling region at the receiver inputs. This margin takes into account the transmitter pulse positions (min and max) and the receiver input setup and hold time (internal data sampling window). This margin allows LVDS interconnect skew, inter-symbol interference (both dependent on type/length of cable), and source clock jitter less than 250 ps. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：MX28F2000PQC-12C4 厂 家：MX 封 装：172 批 号：N/A 数 量：PLCC 说 明： |
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运 费： 所在地： 新旧程度： |
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