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| IPS024G资料 | |
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IPS024G PDF Download |
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File Size : 116 KB
Manufacturer:IR Description:These devices contain two independent positive- edge-triggered D-type flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input may be changed without affecting the levels at the outputs. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：IPS024G 厂 家：IR 封 装：SOP16 批 号： 数 量：250 说 明：SOP16 |
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运 费： 所在地： 新旧程度： |
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| 联系人：关女士 |
| 电 话：86-75584720945 |
| 手 机： |
| QQ：371911117 |
| MSN：gjk8477@hotmail.com,jessica848377@yahoo.com.cn |
| 传 真：86-755 25621209 |
| EMail：kingrand_tek@163.com |
| 公司地址： Huaqiang Electronic World, Futian District, Shenzhen, China |
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