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| FDC6332L资料 | |
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FDC6332L PDF Download |
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File Size : 116 KB
Manufacturer: Description:<Mobile SDRAM> • Power Supply Voltage : 1.7~1.95V • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) -. DS (Driver Strength) • DQM for masking. • Auto refresh. • 64ms refresh period (8K cycle). • 1/CS Support. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：FDC6332L 厂 家： 封 装： 批 号：42k 数 量： 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：关女士 |
| 电 话：86-75584720945 |
| 手 机： |
| QQ：371911117 |
| MSN：gjk8477@hotmail.com,jessica848377@yahoo.com.cn |
| 传 真：86-755 25621209 |
| EMail：kingrand_tek@163.com |
| 公司地址： Huaqiang Electronic World, Futian District, Shenzhen, China |
