首页 > 推广型号列表 > EPM7256AETC100

EPM7256AETC100

EPM7256AETC100资料
	EPM7256AETC100 PDF Download

File Size : 116 KB Manufacturer:ALTERA Description:I2C uses a two-wire serial interface, comprising a bi-directional data line and a clock line. The devic- es carry a built-in 4-bit Device Type Identifier code (1010) in accordance with the I2C bus definition. The device behaves as a slave in the I2C protocol, with all memory operations synchronized by the serial clock. Read and Write operations are initiat- ed by a Start condition, generated by the bus mas- ter. The Start condition is followed by a Device Select Code and Read/Write bit (RW) (as de- scribed in Table 3.), terminated by an acknowl- edge bit. When writing data to the memory, the device in- serts an acknowledge bit during the 9th bit time, following the bus masters 8-bit transmission. When data is read by the bus master, the bus master acknowledges the receipt of the data byte in the same way. Data transfers are terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.

	1PCS	100PCS	1K	10K
价格


型号：EPM7256AETC100 厂家：ALTERA 封装：285 批号：07+ 数量：QFP100 说明：


运费：所在地：新旧程度：