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EPF10K50EQC240-1资料 | |
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EPF10K50EQC240-1 PDF Download |
File Size : 116 KB
Manufacturer:ALTERA Description: C High-performance 32-bit RISC Architecture C High-density 16-bit Instruction Set C Leader in MIPS/Watt C Embedded ICE In-circuit Emulation, Debug Communication Channel Support 32 Kbytes of Internal High-speed Flash, Organized in 256 Pages of 128 Bytes C Single Cycle Access at Up to 30 MHz in Worst Case Conditions C Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed C Page Programming Time: 4 ms, Including Page Auto-erase, Full Erase Time: 10 ms C 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Security Bit Guaranteeing Code Confidentiality C Fast Flash Programming Interface for High Volume Production 8 Kbytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed Memory Controller (MC) C Embedded Flash Controller, Abort Status and Misalignment Detection Reset Controller (RSTC) C Based on Power-on Reset and Low-power Factory-calibrated Brownout Detector C Allows External Reset Signal Shaping and Reset Source Status Clock Generator (CKGR) C Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL Power Management Controller (PMC) C Software Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode C Three Programmable External Clock Signals Advanced Interrupt Controller (AIC) C Individually Maskable, Eight-level Priority, Vectored Interrupt Sources C One External Interrupt Source and One Fast Interrupt Source, Spurious Interrupt Protected Debug Unit (DBGU) C 2-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention Periodic Interval Timer (PIT) C 20-bit Programmable Counter plus 12-bit Interval Counter Windowed Watchdog (WDT) C 12-bit key-protected Programmable Counter C Provides Reset or Interrupt Signals to the System C Counter May Be Stopped While the Processor is in Debug State or in Idle Mode Real-time Timer (RTT) C 32-bit Free-running Counter with Alarm C Runs Off the Internal RC Oscillator One Parallel Input/Output Controller (PIOA) C Twenty-one Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os C Input Change Interrupt Capability on Each I/O Line C Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output Nine Peripheral Data Controller (PDC) Channels One Synchronous Serial Controller (SSC) C Independent Clock and Frame Sync Signals for Each Receiver and Transmitter C I²S Analog Interface Support, Time Division Multiplex Support C High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer One Universal Synchronous/Asynchronous Receiver Transmitters (USART) C Individual Baud Rate Generator, IrDA Infrared Modulation/Demodulation C Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support One Master/Slave Serial Peripheral Interface (SPI) C 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects One Three-channel 16-bit Timer/Counter (TC) C Three External Clock Inputs, Two multi-purpose I/O Pins per Channel C Double PWM Generation, Capture/Waveform Mode, Up/Down Capability |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:EPF10K50EQC240-1 厂 家:ALTERA 封 装:120 批 号:02+ 数 量:QFP240 说 明: |
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运 费: 所在地: 新旧程度: |
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公司地址: Huaqiang Electronic World, Futian District, Shenzhen, China |