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| EP2C5Q208C7N资料 | |
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EP2C5Q208C7N PDF Download |
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File Size : 116 KB
Manufacturer:ALTERA Description:The EB-2100x permits three separate methods for clocking the DDX-2000. The default is via the 256*Fs recovered clock output from the S/PDIF receiver IC. The second is via the expansion header J7 used to apply an external clock source to synchronize, for example, multiple DDX-2000 ICs to the same clock. Zero- ohm jumper R35 is installed to pass either of these clock sources to the DDX-2000 master clock input. The last method is asynchronous from an external crystal.The DDX-2000 contains a crystal oscillator which may be used for single sample-rate applications. Oscillator circuit Y1, C30, C37, R24, R26 may be populated and jumper R35 removed for applications where a 256*Fs clock source is not convenient. The DDX-2000 tolerates a sample rate mismatch of +/-0.2% about the crystal frequency without performance degradation. The crystal footprint is a surface mount Epson MA-506. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号:EP2C5Q208C7N 厂 家:ALTERA 封 装:105 批 号:07+ 数 量:QFP208 说 明: |
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运 费: 所在地: 新旧程度: |
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| 联系人:关女士 |
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| 公司地址: Huaqiang Electronic World, Futian District, Shenzhen, China |