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| EP2C50F484I8N资料 | |
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EP2C50F484I8N PDF Download |
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File Size : 116 KB
Manufacturer:ALTERA Description:Traditional programmable logic architectures do not implement arithmetic functions efficiently or effectively. These functions require high logic cell usage while garnering only moderate performance results. By embedding a dynamically reconfigurable computational unit, the QuickMIPS chip can address various arithmetic functions efficiently and effectively providing for a robust DSP platform. This approach offers greater performance than traditional programmable logic implementations. The ECU block is ideal for complex DSP, filtering, and algorithmic functions. The QuickMIPS architecture allows functionality above and beyond that achievable using DSP processors or programmable logic devices. The embedded block is implemented at the transistor level with the following block diagram in Figure 2. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：EP2C50F484I8N 厂 家：ALTERA 封 装：23 批 号：07+ 数 量：BGA 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：关女士 |
| 电 话：86-75584720945 |
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| EMail：kingrand_tek@163.com |
| 公司地址： Huaqiang Electronic World, Futian District, Shenzhen, China |
