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EP20K600CF33C7

EP20K600CF33C7资料
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File Size : 116 KB Manufacturer:ALTERA Description:Description Reset the scratch pad register with current contents of the EEMEM register. Factory defaults midscale before any programming Write Protect Pin. When active low, WP prevents any changes to the present register contents, except PR and cmd 1 and 8 will refresh the RDAC register from EEMEM. Execute a NOP instruction before returning to WP high. Serial Input Register clock pin. Shifts in one bit at a time on positive clock edges. Serial Data Input Pin. Shifts in one bit at a time on positive clock CLK edges. MSB loaded first. Ground pin, logic ground reference Negative Supply. Connect to zero volts for single supply applications. A terminal of RDAC2. Wiper terminal of RDAC2 B terminal of RDAC2. A terminal of RDAC1. Wiper terminal of RDAC1 B terminal of RDAC1 A terminal of RDAC0. Wiper terminal of RDAC0. B terminal of RDAC0 Positive Power Supply Pin. Test pin 3 (Do Not Connect) Test pin 2 (Do Not Connect) Test pin 1 (Do Not Connect) Test pin 0 (Do Not Connect) I2C Device Address 1 for EEMEM I2C Device Address 0 for EEMEM I2C Device Address 1 for RDAC I2C Device Address 0 for RDAC

	1PCS	100PCS	1K	10K
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型号：EP20K600CF33C7 厂家：ALTERA 封装：28 批号：06+ 数量：BGA 说明：


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