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| EP1S10F780C5资料 | |
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EP1S10F780C5 PDF Download |
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File Size : 116 KB
Manufacturer:ALTERA Description:Push-button Reset Input (MR). A logic low on MR asserts the reset output. Reset remains as- serted as long as MR is low and for trec after MR returns high. This active-low input has an internal 52kΩ pull-up. It can be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if unused. Watchdog Input (WDI). If WDI remains high or low for at least 1.6sec, the internal watchdog timer expires and reset is asserted. The internal watch- dog timer clears while reset is asserted or when WDI sees a rising or falling edge. The watchdog function CAN be disabled if WDI is left unconnect- ed or is connected to a tri-state buffer output. Active-High Reset Output. Active-high, push- pull reset output; inverse of RST. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：EP1S10F780C5 厂 家：ALTERA 封 装：460 批 号：07+ 数 量：BGA 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：关女士 |
| 电 话：86-75584720945 |
| 手 机： |
| QQ：371911117 |
| MSN：gjk8477@hotmail.com,jessica848377@yahoo.com.cn |
| 传 真：86-755 25621209 |
| EMail：kingrand_tek@163.com |
| 公司地址： Huaqiang Electronic World, Futian District, Shenzhen, China |
