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BSM50GB60

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File Size : 116 KB Manufacturer:71 Description:Direct-Memory-Access (DMA) Controller With an Auxiliary Channel Flexible Phase-Locked-Loop (PLL) Clock Generator 32-Bit Expansion Bus (XBus) − Glueless/Low-Glue Interface to Popular PCI Bridge Chips − Glueless/Low-Glue Interface to Popular Synchronous or Asynchronous Microprocessor Buses − Master/Slave Functionality − Glueless Interface to Synchronous FIFOs and Asynchronous Peripherals Three Multichannel Buffered Serial Ports (McBSPs) − Direct Interface to T1/E1, MVIP, SCSA Framers − ST-Bus-Switching Compatible − Up to 256 Channels Each − AC97-Compatible − Serial-Peripheral Interface (SPI) Compatible (Motorola) Two 32-Bit General-Purpose Timers IEEE-1149.1 (JTAG‡) Boundary-Scan-Compatible 352-Pin BGA Package (GJL) (C6202) 352-Pin BGA Package (GNZ) (C6202B) 384-Pin BGA Package (GLS) (C6202) 384-Pin BGA Package (GNY) (C6202B) 0.18-µm/5-Level Metal Process (C6202) 0.15-µm/5-Level Metal Process (C6202B) − CMOS Technology 3.3-V I/Os, 1.8-V Internal (C6202) 3.3-V I/Os, 1.5-V Internal (C6202B)