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BSM25GD100D

BSM25GD100D资料
BSM25GD100D
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Manufacturer:83
Description:  All voltages are measured with respect to GND, unless otherwise specified.   Typicals are at TA = 25C and represent the most likely parametric norm. Shutdown current typ is measured with VCC = 3.3 V. 3Timing specifications are tested at logic levels of VIL = 0.8 V for a falling edge and VIH = 2.1 V for a rising edge. 4Total unadjusted error (TUE) includes offset, gain, and linearity errors of the ADC, multiplexer, and on-chip input attenuators. VBAT is accurate only for VBAT voltages   greater than 1.5 V (see Figure 15). 5Total analog monitoring cycle time is nominally 273 ms, made up of 18 ms 11.38 ms measurements on analog input and internal temperature channels, and   2 ms 34.13 ms measurements on external temperature channels. 6The total fan count is based on two pulses per revolution of the fan tachometer output. The total fan monitoring time depends on the number of fans connected and   the fan speed. See the Fan Speed Measurement section for more details. 7ADD is a three-state input that may be pulled high, low, or left open-circuit. 8Logic inputs accept input high voltages up to 5 V even when device is operating at supply voltages below 5 V. 9Endurance is qualified to 100,000 cycles as per JEDEC Std. 22 method A117, and measured at −40C, +25C, and +85C. Typical endurance at +25C is 700,000 cycles. 10Retention lifetime equivalent at junction temperature (TJ ) = 55C as per JEDEC Std. 22 method A117. Retention lifetime based on an activation energy of 0.6 V   derates with junction temperature as shown in Figure 16.
 
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型 号:BSM25GD100D
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