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AD711AH

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File Size : 116 KB Manufacturer:AD Description:Sustained One Instruction/Clock Execution 4 Kbyte Two-Way Set-Associative Instruction Cache 2 Kbyte Direct-Mapped Data Cache Sixteen 32-Bit Global Registers Sixteen 32-Bit Local Registers Programmable Bus Widths: 8-, 16-, 32-Bit 1 Kbyte Internal Data RAM Local Register Cache (Eight Available Stack Frames) Two 32-Bit On-Chip Timer Units PCI-to-PCI Bridge Unit Primary and Secondary PCI Interfaces Two 64-Byte Posting Buffers Delayed and Posted Transaction Support Forwards Memory, I/O, Configuration Commands from PCI Bus to PCI Bus Two Address Translation Units Connects Local Bus to PCI Buses Inbound/Outbound Address Translation Support Direct Outbound Addressing Support Messaging Unit Four Message Registers Two Doorbell Registers Four Circular Queues 1004 Index Registers Memory Controller 256 Mbytes of 32- or 36-Bit DRAM Interleaved or Non-Interleaved DRAM Fast Page-Mode DRAM Support Extended Data Out and Burst Extended Data Out DRAM Support Two Independent Banks for SRAM / ROM / Flash (16 Mbytes/Bank; 8- or 32-Bit)