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| AD594AQ资料 | |
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AD594AQ PDF Download |
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File Size : 116 KB
Manufacturer:AD Description:The clock input is a gated-OR structure which allows one input to be used as an active LOW clock enable (CE) input. The pin assignment for the CP and CE inputs is arbitrary and can be reversed for layout convenience. The LOW-to-HIGH transition of input CE should only take place while CP is HIGH for predictable operation. A LOW on the master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all bit positions to a LOW state. |
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| 相关型号 | |
| ◆ XC68HC912D60VPV8 | |
| ◆ XC68HC912D60MFU8 | |
| ◆ XC68HC912D60CPV8 | |
| ◆ XC68HC912D60CFU8 | |
| ◆ XC68HC912BD32CFU | |
| ◆ XC68HC912B32VFU8 | |
| ◆ XC68HC912B32MFU8 | |
| ◆ XC68HC912B32CFU8 | |
| ◆ XC68HC705B32CFN | |
| ◆ XC56303VF100 | |
| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：AD594AQ 厂 家：AD 封 装：DIP14 批 号： 数 量：500 说 明：DIP14 |
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运 费： 所在地： 新旧程度： |
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| 联系人：关女士 |
| 电 话：86-75584720945 |
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| 公司地址： Huaqiang Electronic World, Futian District, Shenzhen, China |
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