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首页 > 推广型号列表 > 7MBP50NA060

7MBP50NA060

7MBP50NA060资料
7MBP50NA060
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File Size : 116 KB
Manufacturer:78
Description:The ready/busy status can be determined after the start of a write operation by selecting the device (CS high) and polling the DO pin; DO low indicates that the write operation is not completed, while DO high indicates that the device is ready for the next instruction. If necessary, the DO pin may be placed back into a high impedance state by shifting a dummy 1 into the DI pin. The DO pin will enter the high impedance state on the falling edge of the clock (SK). Placing the DO pin into the high impedance state is recommended in applications where the DI pin and the DO pin are to be tied together to form a common DI/O pin.
 
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型 号:7MBP50NA060
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